Simple Tape Recorder Interface Circuit Diagram

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This is a Simple Tape Recorder Interface Circuit Diagram. However, you can record cassette tapes into any of these machines with an audio interface. The interface allows data to be saved on an ordinary tape recorder at a speed of 2400 bit/s. The serial stream of data Fig. 1 (A) is coded with a clock of 2400 Hz (B), by means of XOR gate IC 1/1. Logical `high` and `low` appear as shown in Fig. 2 (C). 

 Simple Tape Recorder Interface Circuit Diagram




These impulses are lowered in amplitude and feed into the record input of a low cost tape recorder. During the playback, pulses (D) are amplified with CMOS gate IC 1/2 connected as a linear amplifier, and providing a TTL level signal shown in (E). On both positive and negative transitions IC 1/4 forms short pulses as shown in (F) (approx. 50 *ts) that triggers one shot IC2. A monostable one shot pulse width is adjusted to be 3A of bit length (310 µß). 

A change from `high` to `low` in a coded stream generates a `low` pulse width of one bit cell. The same is for change from ' low'' to ' 'high'' that generates a `high` pulse of the same width. During this pulse one shot latches the state of line in D type flip-flop IC3 (G). When a stream consists of multiple `ones` or `zeros,` the one shot is retriggered before it comes to the end of the quasistable state and the state of the flip-flop remains unchanged. The original data stream is available at the output of the flip-flop (). Z80 the DUART that receives these pulses is programmed so that the receiver clock is 16 times the data rate (38.4 kHz).
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Simple SGI Amplifier Circuit Diagram

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This is a Simple SGI or Strain Gauge (Gage) Instrumentation Amplifier Circuit Diagram.This circuit has an overall gain of 320. More gain can easily be obtained by lowering the value of R2. Untrimmed Vas is 10 11V. and Vas tempco is less· than O.lJIV/°C. In many circuits, the OP07 can be omitted, with the two MAX421 differential outputs connected directly to the differential inputs of an integrating a /d.

Simple SGI Amplifier Circuit Diagram


Simple SGI Amplifier Circuit Diagram

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Digital Composite op Amplifier Circuit Diagram

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Build a Digital Composite op Amplifier Circuit Diagram. In the most general sense of the word, any additional circuitry at either the input or the output of an amplifies. A composite configuration greatly reduces de errors without compromising the high-speed, wide band characteristics of HA-2539. The HA-2540 could also be used, but with slightly lower speeds and bandwidth response. 




The HA-2539 amplifies signals above 40 kHz which are fed forward via C2; R2 and R5 set the voltage gain at -10. The slew rate of this circuit was measured at 350 V /p.s. Settling time to a 0.1 % level for a 10-V output step is under 150 ns and the gain bandwidth product is 300 MHz. The HA-5170 amplifies signals below 40kHz, as set by C1 and R1, and controls the de input characteristics such as offset voltage, drift, and bias currents of the composite amplifier

Therefore, it has an offset voltage ofl00 p.V, drift of 2 p.V/°C, and bias currents in the 20-pA range. The offset voltage can be externally nulled by connecting a 20-KO pot to pins 1 and 5; with the wiper tied to the negative supply. The de gains of the HA-5170 and HA-2539 are cascaded; this means that the de gain of the composite amplifier is well over 160 dB. The excellent ac and de performance of this composite amplifier is complemented by its low noise performance, 0.5-p. V rms from 0.1 Hz to 100Hz. It is very useful in high-speed data acquisition systems.
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Simple Electronic Light Sequencer Circuit Diagram

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This is Simple Electronic Light Sequencer Circuit Diagram. The light sequencer uses two ICs and 10 SCRs to create.an ac sequencer. The first 10, a 555 timer, is used to provide clock pulses for 102. The 10 is configured as an astable multivibrator, and its output is on pin 3. 

Capacitors CI and 04, along with resistor R2 and potentiometer PI, control the frequency of the pulses. IC2 is a 4017 Johnson counter, which shifts a high-signal level to each one of its 10 output pins in sequence. Each output pin is resistively coupled to the gate lead an an SCR. When the respective output pin on the 4017 is high and the positive half of the ac cycle is on the anode lead of the SCR, it turns on.




The lamp that is connected to its anode lights. Power is brought into the PC board by the line cord, then the circuit is fuse-protected. Diode LD1 changes the ac to pulsating, which is smoothed by C2 and C3. R23 limits the current, and zener diode D2 limits the dc voltage to 6 Vdc.
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Build a Buffer Amplifiers Circuit Diagrams

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How to build a buffer amplifiers circuit diagrams. A buffer amplifier is one that provides electrical impedance transformation from one circuit to another. These two buffer/amplifiers that have been successfully used with VFOs: one (shown in A) is based on a pair of bipolar npn transistors, and the other (shown in B) is built around a dual-gate MOSFET.


Buffer Amplifiers Circuit Diagrams

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Digital H-V AC Switcher Circuit Diagram

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This is a digital H-V or high voltage AC switcher circuit diagram, Switching a high voltage AC requires use of opto couplers to isolate the High Voltage from the micro controller. A basic circuit to trigger an SCR is shown in Fig. 67 -lA. This circuit has the disadvantage that the blocking voltage of the photon-coupler output device determines the circuit-blocking voltage, irrespective of higher main SCR capability. Adding capacitor Cl to the circuit, as shown in Fig. 67-lB, will reduce the dV!dt seen by the photoncoupler output device.

 Digital H-V AC Switcher Circuit Diagram

 Click right and Save image and zoom for best view
The energy stored in Cl, when discharged into the gate of SCRl, will improve the dildt capability of the main SCR. Using a separate power supply for the coupler adds flexibility to the trigger circuit; it removes the limitation of the blocking voltage capability of the photon-coupler output device. The flexibility adds cost and more than one power supply might be necessary for multiple SCRs if no common reference points are available. 67-lC, Rl can be connected to Point A. which will remove the voltage from the coupler after SCRl is triggered. `or to Point B so that the coupler output will always be biased by input voltage.

The former is preferred since it decreases the power dissipation in Rl. A more practical form of SCR triggering is shown in Fig. 67 -IF. Trigger energy is obtained from the anode su]Jply and stored in Cl. Coupler voltage is limited by the zener voltage. This approach permits switching of higher voltages than the blocking voltage capability of the output device of the photon coupler. To reduce the power losses in Rl and to obtain shorter time constants for charging Cl, the zener diode is used instead of a resistor. A guide for selecting the component values would consist of the following steps: Choose Cl in a range of 0.05 to 1 p.F.

The maximum value might be limited by the recharging time constant (RL + R1) C1 while the minimum value will be set by the minimum pulse width required to ensure SCR latching. R2 is determined from peak gate current limits, if applicable, and minimum pulse width requirements. Select a zener diode. A 25-V zener is a practical value, since this will meet the usual gate requirement of 20 V and 20 0. This diode will also eliminate spurious triggering because of voltage transients. Photon coupler triggering is ideal for the SCR`s driving inductive loads. By ensuring that the LASCR latches on, it can supply gate current to SCRl until it stays on.
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One IC Based One Chip Chime Circuit Diagram

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Build a One IC Based One Chip Chime Circuit Diagram. This circuit uses only one IC, produces a pleasant tone, and sports a single control for adjusting the tone`s chiming rate. IC1A and IC1B form an astable multivibrator, which produces the circuit`s basic tone.

 
 One IC Based One Chip Chime Circuit Diagram
 
The multivibrator`s frequency is: The component values produce a 668-Hz tone. IC1C buffers the multivibrator`s output to the 8- speaker. Current-limiting resistor R2, determines the speaker`s volume. R2 minimum value is 220 . IC1D and IC1E form an asymmetric, astable multivibrator, which adds a chime effect to the circuit`s basic tone. 

The chime effect`s frequency is: R7 gives this rate multivibrator a slowly varying output signal to produce a pleasant decay for the chime effect. IC1F is an inverting amplifier for the chime multivibrator.
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Electronic Solid State Stepping Switch Circuit Diagram

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This is a simple Electronic Solid State Stepping Switch Circuit Diagram. Solid is one of the four fundamental states of matter. It is characterized by structural rigidity and resistance to changes of shape or volume. In electrical controls, a stepping switch , also known as a stepping relay, is an electromechanical device which allows an input connection to be connected to one of a number of possible output connections, under the control of a series of electrical pulses. 


 

This circuit was designed to make switching of a 48-channel mobile transceiver safe to operate while mobile. The oscillators allow for single-stepping or a scanning function. The scan facility allows for stepping through all 48 channels to check for occupancy or otherwise, and each output is indicated with an LED and labeled accordingly, so at-a-glance indication is possible.With full scope of this circuit it is possible to scan 256 channels and by adding more 4 to 16 line encoders etc. you could switch to any required number.
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Electronic Touch On Switch Circuit Diagram

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This is a simple Electronic Touch On Switch Circuit Diagram. The Touch Switch circuit will detect stray voltages produced by mains voltages and electrostatic build-up in a room. This touch on-only switch can be triggered into conduction by electrical means, and can only be reset by way of a mechanical switch. When the touch terminal is contacted by a finger, the SCR turns on and illuminates LED1.

Electronic Touch On Switch Circuit Diagram


Electronic Touch On Switch Circuit Diagram

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Simple 2 Door Annunciator Circuit Diagram

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Security system or alarms such as doorbell and Door Annunciator are most wanted in industries and institutional use. This is a Simple 2 Door Annunciator Circuit Diagram. When the push buttons at either door are depressed, this circuit generates a different tone for each door. Tones are generated by phase-shift oscillator Q1/Q2. Q3 provides tone frequency change by changing the phase-shift network. U2 and U3 are timers for the tones and Q4/Q5 interface the timers with the push buttons. 



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Simple WBA Amplifier Circuit Diagram

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This is a simple (WBA) wide band agc amplifier circuit diagram. In this circuit The NE592 is connected in conjunction with a MC1496 balanced modulator to form an excellent automatic gain control system. The signal is fed to the signal input of the MC1496 and re-coupled to the NE592. Unbalancing the carrier input of the MC1496 causes the signal to pass through unattenuated. Rectifying and filtering one of the NE592 outputs produces a de signal which is proportional to the ac signal amplitude. After filtering, this control signal is applied to the MC1496, causing its gain to change. 




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Build a Schmitt Trigger Circuit Diagram

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This is a simple Schmitt Trigger Circuit Diagram. Schmitt trigger is a comparator circuit with hysteresis, implemented by applying positive feedback to the non inverting input of a comparator or differential amplifier. It is an active circuit which converts an analog input signal to a digital output signal. In this circuit A 555 IC is shown configured to function as a Schmitt trigger. Inputs above and below the threshold level will turn the circuit on and off producing a square wave output. 

Schmitt Trigger Circuit Diagram

Schmitt Trigger Circuit Diagram

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Digital Electronic Door Buzzer Circuit Diagram

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This is a simple Digital Electronic Door Buzzer Circuit Diagram. Affordable simple door buzzers and buzzer systems for door entry security in homes, offices and buildings. When SI is depressed, an initial positive voltage is placed on C2 and the noninverting terminal of Ul. The circuit oscillates at a low frequency. As C2 charges up through R3, a rapid increase in frequency of oscillation results, producing (at SPKR1) a rapidly rising pitched sound. This sound is easily recognized over ambient noise. 


Digital Electronic Door Buzzer Circuit Diagram

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Digital Optical TTL Coupler Circuit Diagram

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Digital Optical TTL Coupler Circuit Diagram. TTL converter options for underwater photography, TTL converters and strobes that support optical TTL. For higher speed applications, up to 1-MHz NRZ, the Schmitt-trigger output HllL series optoisolator provides many features. The 1.6-mA drive current allows fan-in circuitry to drive the IRED, while the 5-V, 270-0 sink capability and lOOns transition times of the output add to the logic coupliug flexibility. 



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Input Minimum Maximum Selector Circuit Diagram

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This is a simple Input Minimum Maximum Selector Circuit Diagram. This circuit outputs the maximum (or the minimum) of the four input voltages Vv V2, V3, and V4. Each of these input voltages is in the range 0 to 5 V. The output of the unit is the maximum of Vv V2, V3, and V4 if the control voltage input is 5 V (i.e., logical 1). The output is the minimum of Vv V2, V3, and V4 if the control input is zero. By cascading TV such units, one can select the maximum (or the minimum) of 3N + 1 input voltages. Thus if k is the number of input voltages, we need [(/c+l)/3] units.



Input Minimum Maximum Selector Circuit Diagram

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Capacitance Operated Battery Powered Light Circuit Diagram

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Build a simple Capacitance Operated Battery Powered Light Circuit Diagram. Capacitance is the ability of a body to store an electrical charge. Any object that can be electrically charged exhibits capacitance. A common form of energy storage device is a parallel-plate capacitor. Touch the plate and the light will go on and constant of the 47 µf capacitor and the 2M remain on for a time determined by the time resistor.


Capacitance Operated Battery Powered Light Circuit Diagram

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Simple Sound Activated Tape Switch Circuit Diagram

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This is a Simple Sound Activated Tape Switch Circuit Diagram. This circuit can cause a cassette recorder to automatically tum on and record when a sound or noise is present. Another use, is when the sound-activated switch is used to tum on a cassette player so that it operates as a burglar-alarm detector and sounder. Op amps Ula and Ulb are connected in tandem to amplify the sounds picked up by the detector`s mike. 

The amplified audio voltage, output at pin 7 of Ulb, is fed to a voltage`doubler circuit, consisting of Dl and D2. The elevated voltage from the doubler circuit is input to the positive input of op amp Ulc, which is operating as a simple comparator circuit.Sound-activated-tape-switch The other input of Ulc is connected to a voltage divider that sets the switching point for the de signal voltage, to turn on when the signal level is greater than about 1.5 V. As the comparator switches on, its output at pin 8 becomes positive and supplies a forward bias to tum on D3 and Ql, which in tum, starts the recorder. 

 Simple Sound Activated Tape Switch Circuit Diagram




The rc combination of C4/R9 sets the cassette`s run time after the input sound has ceased, preventing the recorder from chopping-up or turning-off between closely spaced sounds or words picked up by the mike. The delay time is roughly 6 to 8 seconds. Rll sets the circuit`s gain. Connect a low-impedance cassette mike to the amplifier`s input, and connect the output of Ql to the cassette`s remote input or to the internal input and set the recorder to the record position. Talk and adjust the amplifier`s gain with Rll for the desired sensitivity.
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Build a Differential Instrumentation Amplifier Circuit Diagram

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Build a Differential Instrumentation Amplifier Circuit Diagram. An instrumentation amplifier is a type of differential amplifier that has been outfitted with input buffer amplifiers, which eliminate the need for input impedance matching and thus make the amplifier particularly suitable for use in measurement and test equipment.This circuit relies on extremely high input impedance for effective operation. The HA-5180 with its JFET input stage, performs well as a preamplifier. 




The standard three amplifier configuration is used with very close matching of the resistor ratios R5/R4 and (R7 + R8)/R6, to insure high common-mode rejection (CMR). The gain is controlled through R3 and is equal to 2RI/R3. Additional gain can be had by increasing the ratios R5!R4 and (R7 + R8)!R6. The capacitors C1 and C2 improve the ac response by limiting the effects of transients and noise. 

Two suggested values are given for maximum transient suppression at frequencies of interest. Some of the faster DVM`s are operating at peak sampling frequency of 3-kHz, hence the 4-kHz, low-pass time constant. The 40kHz, low-pass time constant for ac voltage ranges is an arbitrary choice, but should be chosen to match the bandwidth of the other components in the system. C1 and C2 might however, reduce CMR for ac signals if not closely matched. Input impedance's have also been added to provide adequate de bias currents for the HA-5180 when open-circuited.
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Simple Electronic Coin Tosser Circuit Diagram

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This is a Simple Electronic Coin Tosser Circuit Diagram. For this project, you create an electronic version of a coin toss. Instead of flipping a coin into the air to see if it lands heads or tails, you build an electronic.The circuit shown simulates the flipping of a coin by merely pushing switch PB1. This is an easy circuit.

Simple Electronic Coin Tosser Circuit Diagram

Simple Electronic Coin Tosser Circuit Diagram

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Simple Diode Feedback Comparator Circuit Diagram

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This is a Simple Diode Feedback Comparator Circuit Diagram. This circuit can drive an LED display with constant current independently of wide power supply voltage changes. It can operate with a power supply range of at least 4V to 30V. With 10M resistances for R2 and R3 and the inverting input of the comparator grounded, the circuit becomes an LED driver with very high input impedance. The circuit can also be used in many other applications where a controllable constant current source is needed.

Diode Feedback Comparator Circuit Diagram

Diode Feedback Comparator Circuit Diagram

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Wide band Instrumentation Amplifier Circuit Diagram

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This is a simple Wide band Instrumentation Amplifier Circuit Diagram. A high performance, wide band instrumentation amplifier includes a main differential amplifier channel which receives an input signal having both differential . Has an input resistance of 1-MO, a bandwidth from de to about 35 MHz, and a gain of 10 times. 



 Wide band Instrumentation Amplifier Circuit Diagram

Low frequency gain is provided by a CA3130 BiMOS op amp operated as a single-supply amplifier. High-frequency gain is provided by a 40673 dual-gate MOSFET. The entire amplifier is nulled by shorting the input to ground and adjusting R9 for zero de output voltage.
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Comparator with Variable Hysteresis Circuit Diagram

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This is a simple Comparator with Variable Hysteresis Circuit Diagram.Variable Hysteresis  is a Band Current Controller for Power. An operational amplifier can be used as a convenient device for analog comparator applications that require two different trip points. 


Comparator with Variable Hysteresis Circuit Diagram

 The addition of a positiver feedback network introduces a precise variable hysteresis into the usual comparator switching action. Such feedback develops two comparator trip points centered about the initial trip point or reference point The voltage difference, AV, between the trip points can be adjusted by varying resistor R2. When the output voltage is taken from the zener diode, as shown, it switches between zero and Vz, the zener voltage.
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Simple Dc Static Switch Circuit Diagram

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This is a Simple Dc Static Switch Circuit Diagram. This circuit is a static SCR switch for use in a dc circuit. When a low power signal is applied to the gate of SCR1, this SCR is triggered and voltage is applied to the load. The right hand plate of C charges positively with respect to the left hand plate through Rl. 


 Simple Dc Static Switch Circuit Diagram


When SCR2 is triggered on, capacitor C is connected across SCR1, so that this SCR is momentarily reverse biased between anode and cathode. This reverse voltage turns SCR1 off provided the gate signal is not applied simultaneously to both gates. The current through the load will decrease to zero in an exponential fashion as C becomes charged.


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The Final Cell Phone Jammer Circuit Project

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After having huge requested of Johnson John, Jishnu Np, aswinth raj and others. we are going to start dual band mobile jammer for GSM 900 and GSM 1800 done by Ahmed Sudqi Hussein, Abdul-Rahman, Ahmad Nasr and Raja Mohammad. This project is not based on voilation it is a project through it, student and hobiyists can get many benfit for thier social and acadmic life.

1. Introduction
Communication jamming devices were first developed and used by military. This interest comes from the fundamental objective of denying the successful transport of information from the sender (tactical commanders) to the receiver (the army personnel), and vice-versa. Nowadays, mobile (or cell) phones are becoming essential tools in our daily life. Here in Jordan, for example, with a rather low population (around 5 million), three main cell phone carries are available; namely; Zain, Orange, and Umniah  

The first two use the GSM 900 system, while the third uses the GSM 1800 system. Needless to say, the wide use of mobile phones could create some problems as the sound of ringing becomes annoying or disrupting. This could happen in some places like conference rooms, law courts, libraries, lecture rooms and mosques. One way to stop these disrupting ringings is to install a device in such places which will inhibit the use of mobiles, i.e., make them obsolete. Such a device is known as cell phone jammer or "GSM jammer", which is basically some kind of electronic countermeasure device. 

The technology behind cell phone jamming is very simple. The jamming device broadcasts an RF signal in the frequency range reserved for cell phones that interferes with the cell phone signal, which results in a "no network available" display on the cell phone screen. All phones within the effective radius of the jammer are silenced. It should be mentioned that cell phone jammers are illegal devices in most countries. According to the Federal Communications Commission (FCC) in the USA: "The manufacture, importation, sale, or offer for sale, of devices designed  to block or jam wireless transmissions is prohibited". 

However, recently, there has been an increasing demand for portable cell phone jammers. We should mention that this project, presented in this report, is solely done for educational purposes. There is no intention to manufacture or sell such devices in Jordan, or elsewhere. In this project, a device that will jam both GSM 900 and GSM 1800 services will be designed, built, and tested.

2. Jamming Techniques
There are several ways to jam an RF device. The three most common techniques can becategorized as follows:

1. Spoofing
In this kind of jamming, the device forces the mobile to turn off itself. This type is very difficult to be implemented since the jamming device first detects any mobile phone in a specific area, then the device sends the signal to disable the mobile phone. Some types of this technique can detect if a nearby mobile phone is there and sends a message to tell the user to switch the phone to the silent mode (Intelligent Beacon Disablers).

2. Shielding Attacks
This is known as TEMPEST or EMF shielding. This kind requires closing an area in a faraday cage so that any device inside this cage can not transmit or receive RF signal from outside of the cage. This area can be as large as buildings, for example.

3. Denial of Service
This technique is referred to DOS. In this technique, the device transmits a noise signal at the same operating frequency of the mobile phone in order to decrease the signal-to-noise ratio (SNR) of the mobile under its minimum value. This kind of jamming technique is the simplest one since the device is always on. Our device is of this type.

3. Design Parameters
Based on the above, our device which is related to the DOS technique is transmitting noise on the same frequencies of the two bands GSM 900 MHz, and GSM 1.8 GHz (known also as DCS 1800 band). We focused on some design  parameters to establish the device specifications. 

These parameters are as follows:

1. The distance to be jammed (D)  
This parameter is very important in our design, since the amount of the output power of the jammer depends on the area that we need to jam. Later on we will see the relationship between the output power and the distance D. Our design is established upon D=10 meters for DCS 1800 band and D=20 meters for GSM 900 band.

2. The frequency bands

Table 1: Operating frequency bands.

Table 1: Operating frequency bands.


3. Jamming–to-signal ratio {J/S}
Jamming is successful when the jamming signal denies the usability of the communication transmission. In digital communications, the usability is denied when the error rate of the transmission can not be compensated by error correction. Usually, a successful jamming attack requires that the jammer power is roughly equal to signal power at the receiver (mobile device).

The general equation of the jamming-to-signal ratio is given as follows:


 where: Pj=jammer power, Gjr= antenna gain from jammer to receiver, Grj=antenna gain from tr=range between communication transmitter and receiver, receiver to jammer, R r=communication receiver andwidth, Lr =communication signal loss, Pt=transmitter power, B tr= antenna gain from transmitter to receiver, G rt=antenna gain from receiver to transmitter,G jr=range between jammer and communication receiver, Bj=jammer bandwidth, and R j=jamming signal loss. L min is 9 dB which will be used as the worst case scenario For GSM, the specified system SNR r is -15 dBm. for the jammer. The maximum power at the mobile device P 

4. Free space loss {F}
The free-space loss (or path loss) is given by:
4. System Design 

4.1 Power calculations
Here, we need to find the power that is needed to be transmitted to jam any cell phone within a distance of around 10 meters for DCS. From the above considerations, we can find the required output power from the device, as follows: 

Using SNR=9 dB and the maximum power signal for mobile receiver=-15 dBm, gives J=-24 dBm. But, our goal is to find the output power from the device, so when we add the free space loss to the amount of power at the mobile receiver we get our target: Output power=-24dBm+58dB = 34 dBm

4.2 Parts of the jammer device
Figure 1 shows the block diagram for the jammer to be designed. 


4.2.1 The Power supply
This is used to supply the other sections with the needed voltages. Any power supply consists of the following main parts:
Transformer: - is used to transform the 220VAC to other levels of voltages.
Rectification: - this part is to convert the AC voltage to a DC one. We have two methods for rectification:
A] Half wave-rectification: the output voltage appears only during positive cycles of the input signal.
B] Full wave –rectification: a rectified output voltage occurs during both the positive and negative cycles of the input signal.
The Filter:  used to eliminate the fluctuations in the output of the full wave rectifier “eliminate the noise” so that a constant DC voltage is produced. This filter is just a large capacitor used to minimize the ripple in the output.
Regulator: this is used to provide a desired DC-voltage.

Figure 2 shows the general parts of the power supply. 


.2.2 The IF-section 4
ammer sweeps the VCO through the desired range of frequencies. The tuning section of the j Basically, it is just a triangle or sawtooth-wave generator; offset at a proper amount so as to sweep the VCO from the minimum desired frequency to a maximum. The tuning signal is generated by a triangular wave mixed with noise. The IF section consists of three main parts:

1. Triangle wave generator. (To tune the VCO in the RF section)
2. Noise generator (provides the output noise).
3. Mixer” summer” (to mix the triangle and the noise waves).

Triangle wave generator
 wave is to sweep the VCO through the desired frequency range. The main use of the triangle We want to cover the downlink through our VCO, i.e.,   935-960 MHz for VCO66CL, and 1805-1880MHz for VCO55BE. timer IC operating in the a-stable mode to generate the In our design, we will use 555 sweeping signal. The output frequency depends on the charging and discharging of the capacitor, resistors values and the power supply for the IC. Figure 3 shows how we can use the 555timer in the general A-stable mode




In our project, we used Ra=Rb=750   with C=0.1 µF, then the output frequency is 10 KHz Since we use +12 V (Vcc), the output signal will be bounded from 4 V (Vcc/3) to 8 V. Figure 5 shows all the components used to generate the triangular wave. The output (2Vcc/3) is shown in figure 6. 


Noise generation
Without noise, the output of the VCO is just an un-modulated sweeping RF carrier. So, we need to mix the triangular signal with noise (FM modulating the RF carrier with noise). To generate noise signal, we used the Zener Diode operated in reverse mode. Operating in the reverse mode causes what is called avalanche effect, which causes wide band noise. This noise is then amplified and used in our system. We use two amplification stages: in the first stage, we use NPN transistor as common emitter, and in the second stage, we use the LM386 IC {Audio amplifier}. This is shown in Figure 7. The output of this section is clearly seen in
Figure 8. 




Mixer
The mixer here is just an amplifier that operates as a summer. So, the noise and triangula wave will add together before entering the VCO. The LM741 IC was used to achieve this.



Then, the sweep signal that will sweep the RF-section is as shown in Figure 11. The tuning signal is highly noisy as seen in Figure 11. The whole IF-Section is seen in Figure 12. The IF- section schematic is shown in Figure 13. 




4.2.3 The RF-Section
This is the most important part of the jammer, since the output of this section will be interfacing with the mobile. The RF-section consists of three main parts: voltage controlled oscillator VCO, power amplifier and antenna. 

The voltage controlled oscillator (VCO) is the heart of the RF-section. It is the device that generates the RF signal which will interfere with the cell phone. The output of the VCO has a frequency which is proportional to the input voltage, thus, we can control the output frequency by changing the input voltage.  When the input voltage is DC, the output is a specific frequency, while if the input is a triangular waveform, the output will span a specific frequency range. In our design, we need to find a VCO for GSM 900 and GSM 1800. There are three selection criteria for selecting a VCO for this application. Most importantly, it should cover the bands that we need, secondly, it should be readily available at low cost, and
finally, it should run at low power consumption. Moreover, we need to minimize the size of GSM-jammer. So, we started to search through the internet for VCO's that work for GSM 900 & GSM 1800 bands.

Finally, we found the following VCO IC’s:-
CVCO55BE; this is for GSM 1800. The output frequency is 1785-1900 MHz and the output power is up to 5 dBm.
CVCO55CL; this is for GSM 900. The output frequency is 925-970 MHz and the outputpower is up to 8 dBm.

We chose these IC’s for the following reasons:-
[A] Surface mount, which reduces the size of product.
[B] Having large output power that reduces the number of amplification stages that we need.
[C] Having same value of power supply which is typically equal to 5 volt.


The power amplifier: Since 5 dBm output power from the VCO does not achieve the desired output power of the GSM jammer, we had to add an amplifier with a suitable gain to increase the VCO output to 34 dBm. We obtained our amplifier IC (PF08109B ) from an old mobile as it was the most suitable, cheapest and easiest way to get one. The PF08109B, shown in Figure 15, has high gain of 35 dB. As datasheets illustrated that this IC is designed to work in dual band GSM & DCS, we firstly designed and built our circuit using only one power amplifier IC. Upon testing, the jammer didn’t work properly. It was
concluded that amplifier IC does not work at the two bands simultaneously. Such a fact was not indicated in the datasheets. This result was really a big shock, but easily solved by changing the whole RF design. The new design uses two power amplifier IC’s instead of one amplifier. Figure 16 shows the two designs for the RF-Section.

Antenna: A proper antenna is necessary to transmit the jamming signal. In order to have optimal power transfer, the antenna system must be matched to the transmission system. In this project, we used two 1/4 wavelength monopole antennas, with 50   input impedance so that the antennas are matched to the system. We used monopole antenna since the radiation pattern is omni-directional. Figure 17 shows the DCS 1800 antenna, while Figure 18 shows the GSM 900 antenna.




Figure 19 shows the RF-Section. The traces in the RF-section were designed to get 50 impedance to insure matching between the IC’s and the board. 






Results
As we tested our jamming device, the result was a full success. The device was able to jam the three cell phone carriers: Zain, Orange, and Umniah. The effective jamming range was around 30 meters. This is more than what it was designed for. The reason is that in our calculations, we considered the worst case of having the cell phone close to the base station. It is expected that as the distance between the cell phone and the base station increases, the effective jamming distance will increase. This is due to the fact that the amount of power reaching the cell phone from the base station decreases as the cell phone moves farther from the base station.  The Figure in the next page shows the results. It can be clearly seen that the signal is "ON" when the jammer is "OFF", while the signal disappears when the jammer is "ON".

Conclusions
 In this project, which turned out to be a full success, we designed a device that stops phone ringing. This device could be used in places where ringing is not desired at specific times, as these ringings may disturb people in such places. The designed device works in dual band. It jams both the GSM 900 and GSM 1800 bands. The device was able to jam the three main cell phone carriers in Jordan.

The project was implemented according to the following plan:     

We started by studying the jamming techniques, and GSM system to find the best jamming method. The system block diagram was also specified in this stage.   

We searched for components that are needed for building this device, and specified the main components which were :    
For RF section, we needed two VCO’s that operate at the needed bands, two power amplifier, and two antennas
For the IF section, we used 555timer, Zener diode, mixer, PC power supplyand some discrete components (resistors and capacitors).    

The schematic was drawn and some simulations for the IF-Section were performed.Then, we started to design the layout using Express PCB and AutoCAD softwares. 

The PCB was built using the etching process on copper clad board.        
All the IF- components were bought from local companies. Then, the IF-section was built and tested.

After that, we began to search for the RF-components (VCO and the board) in the local market. Since we failed to collect these IC’s from the local market, we had to order them from "Digi-key" US company.    

Finally, we assembled and tested the jammer. Fortunately, we got positive results. Both bands were fully jammed.

We hope that this project will be useful for the community where such  jamming devices are needed. 



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Simple Sound Generator Circuit Diagram

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This is a simple Run-Down Clock or Sound Generator circuit diagram. Used in electronic roulette or dice games, this circuit produces a clock signal that initially is several tens of kHz (depending on C2) and gradually decreases to zero in about 15 seconds, as CI discharges through R4.


Simple Sound Generator Circuit Diagram

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Pseudo Random Bit Sequence Generator Circuit Diagram

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This is a simple Pseudo Random Bit Sequence Generator Circuit Diagram. A binary sequence is a sequence of bits, i.e. A BS consists of ones and zeros.In this circuit, an additional exclusive-OR gate is connected after the modulo-2 feedback, with CI and R2 applying the supply turn-on ramp into the feedback loop. 



Pseudo Random Bit Sequence Generator Circuit Diagram


This provides sufficient transient signal so that the PRBS generator can self-start a power-up. A shift-register length of 10 is shown with feedback at stages 3 and 10, providing true and inverted maximal length sequence outputs. This technique applies an input directly to the feedback loop.

Therefore, it`s considered more reliable than applying an RC configuration to the shift-register reset input to create a random turn-on state.
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