O/p resistance of Mosfet

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In analog applications such as current mirrors or active loads, it is important for the transistor to have a large output resistance. Such circuits emulate a current source or current sink, and the Norton resistance of such a circuit should be large for ideal behavior.
The output resistance, usually denoted by rO, is a measure of how much drain-to-source voltage change is necessary to cause a given change in transistor output current when the transistor is in active mode. This resistance depends upon VGS, of course, because the channel conductivity depends upon the number of carriers within it, and that increases with gate voltage. However, rO also varies with VDS.
The reason a change in drain bias changes the resistance is that the channel exists only when the oxide field is sufficient to form a channel. At the source itself the oxide field is dependent upon the voltage drop VGS, which in active mode is above the threshold voltage, and so a channel forms. However, near the drain the oxide field depends upon VGD, and the applied drain voltage VDS makes VGD smaller than VGS because VDS brings the drain closer in voltage to the gate than is the source. The field in the oxide above the channel interpolates between these two values. In the ohmic or triode mode, a channel exists all the way from source to drain. But in the active mode, the drain voltage is high enough that somewhere between the source and drain the oxide field becomes too low to form a channel. The channel ends and dumps its carriers into the bulk semiconductor to finish their trip toward the drain without a channel. The termination of the channel is called the pinch-off point and it moves toward the source as the drain voltage increases. The channel becoming shorter as drain bias increases, the resistance between source and pinch-off point drops, so there results a lowering of output resistance with increase in drain bias. This phenomenon is called either channel-length modulation or the Early effect.
According to a simple empirical model patterned after the bipolar model for output resistance, the output resistance is given by:
 r_O = \left. \frac {\partial V_{DS}}{\partial I_{DS}}\right|_{V_ {GS}=\text{constant} }  =  \frac{ 1/\lambda + V_{DS}}{I_{DS}(V_{GS},\ V_{DS})} ,
where λ is called the channel-length modulation parameter with dimensions V−1 and 1/λ plays the role of the Early voltage VA found in the bipolar model. The current IDS(VGS, VDS) is the drain current evaluated at the selected gate and drain voltages. It should be noted that this formula for output resistance is largely a fiction of hand analysis, and cannot be trusted. For example, the figure shows a tentative attempt to establish λ for a rather old 3/4μm technology. A single value for λ provides only a crude indicator of the slope of these curves in active mode.
To illustrate that λ is a function, not a constant, the lower figure shows measured values of VA=1/λ for a 0.18μm MOSFET process at a bias in the active mode of VGD=VGS−VDS=0 V. Here, VA = 1/λ increases by an order of magnitude as the channel becomes stronger. The need to employ a variety of λ-values is even greater in today's technology where λ is a function of device geometry in three dimensions (not just channel length, although this is important) and bias voltages. In practice, a particular value is calculated for each situation using a numerical model of the transistor or is measured directly.
Generally speaking, the output resistance of MOSFETs is low, and where high resistance is necessary, special circuit techniques involving multiple transistors are implemented to increase the effective resistance.
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Operation of MOSFET

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A narrow, surface inversion layer of electrons forms at large enough positive gate voltages. The horizontal dashed line indicates the Fermi level, the energy of levels (should they exist) that are half-occupied at the selected temperature.
The control of the channel by the gate is similar to the formation of an inversion layer in the MOS capacitor, which is only a two-terminal device (gate and body contacts). The case of a p-type semiconductor body in which mobile holes are introduced in the valence band by introducing acceptor impurities is described below. The acceptors suck electrons out of the valence band, becoming fixed negative ions, and leaving electron vacancies in the valence band that behave as positively charge mobile holes.
The formation of this layer is understood by examining the behavior of the energy band edges under an applied field. The left-hand panels of the figure depict the lowest energy level of the conduction band of energies and the highest energy level of the valence band of energies (separated by the forbidden gap with no available energy levels) as a function of depth into the semiconductor body. In the figure's top panel, an applied voltage bends these band edges (left). This bending causes the valence band to become filled with electrons, so no holes are present. On the upper right, the figure shows the charge inducing this bending (Q) is balanced by a layer of negative acceptor-ion charge –QA in this depletion region where there are no holes. This depletion region of negative acceptor ions widens until neutrality is reached Q−QA = 0. In the bottom panel, a larger applied voltage further depletes holes from the surface but the conduction band becomes low enough in energy to populate with electrons near the surface, forming an inversion layer. The charge inducing the inversion layer is now balanced both by the inversion layer charge –Qn and by the depletion layer charge –QA, so now Q–Qn−QA = 0. Once the applied voltage is large enough to begin formation of the inversion layer, the charge balance is dominated by this layer, and the depletion region no longer expands significantly.
The electrons in the surface channel are mobile and form a conducting surface layer atop the insulating layer of fixed, immobile acceptor ions in the depletion region. The source and drain contacts on the body surface become connected by this conducting surface layer, so the formation of the inversion layer allows current to flow from the source to the drain. By contrast, when the conducting surface layer is not present, no conduction occurs, even when the surface layer is not depleted and holes are present. The contacts cannot conduct using holes because they are n-type semiconductor regions, and form pn-diode junctions with the body.
Thus, the source and drain are not electrically connected for voltages between zero and the threshold voltage for inversion layer formation. But once threshold voltage is exceeded, connection is established. The MOSFET constitutes an electrically controlled switch. The quantitative current-voltage behavior of the modern MOSFET is described by complex computer models.

Two device types: n- and p-channel

The device above uses a p-type body and an electron inversion layer, or n-channel. In CMOS circuits these n-channel MOSFETs are combined with p-channel MOSFETs that use an n-type body and a hole inversion layer. These CMOS circuits consume low power as only the active devices in a sub-circuit (either the n-channel or the p-channel devices) are operational at a given time, and the complementary devices are "off".

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The Metal-oxide-semiconductor field-effect transistor (MOSFET) is a type of FET that consists of three layers: a metal top electrode (a conductor, called the gate), an oxide layer (working as an insulator separating the gate from the semiconductor layer), and a semiconductor layer (called the body). Its operation is based upon the modulation of the semiconductor conductivity by the electric field introduced in the body by the gate, the so-called field effect. This transistor was invented by Dawon Khang and Martin Atalla in 1960, at Bell Labs.
There are four contacts altogether: in addition to the gate and body contacts already described, there are two contacts atop the body at opposite sides of the gate called source and drain. Because the transistor is symmetrical, they can swap their functions. They do not permit current flow to the body in normal operation, as they form reverse biased diodes with the body. They do allow current between source and drain upon formation (by the gate) of a surface channel at the top surface of the body, next to the insulator. The channel conductivity depends upon the voltage difference between the gate and body (Vgb). The amount of current drawn in the channel depends upon the voltage drop across it, the drain to source voltage (Vds). The channel strength also is affected by so-called "back gate bias", that is, by the body to source voltage (Vbs).
The modern MOSFET structure is shown in the figure (with a bow to artistic license). It is rather complex, as it is made to control a number of undesirable or parasitic effects that detract from its ideal behavior. Among these are unwanted capacitances between the gate and source and gate and drain, reduced by introduction of spacers at the sides of the gate. Another problem is high source-to-body and drain-to-body capacitance, which is reduced by raising the source and drain above the body, so the sidewall contact areas are reduced. These parasitic capacitances have to be charged and discharged between on and off conditions, and slow down device operation. Also undesired is penetration of the source and drain fields underneath the gate, which interferes with the channel formation. That effect is reduced by use of shallow junction extensions and screening halo implants, both designed to keep the source and drain fields close to their electrodes, and away from the gate.
For power applications a different geometry is used, notably asymmetric in drain and source geometry. Special attention is given to the drain, which is adapted to large drain voltages. The figure shows an example called the UMOSFET because of the U-shaped gate. This cross-section is is only one from a huge array of identical parallel fingers (the diagram is repeated to right and left with identical structures) all tied together in one device to handle large currents. As indicated by different colors in the figure, the source and drain are both n-type, and the body is p-type, or vice versa. The drain is specially doped to have a wide drift region, allowing reduction of the large drain voltage before it reaches the channel, and also allowing the current from the channel to spread out before reaching the drain contact, lowering the device resistance. The channel is present only when the gate voltage is large enough to turn the device "on", forming an inversion layer.
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Limitations of real op-amps

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Real op-amps can only approach this ideal: in addition to the practical limitations on slew rate, bandwidth, offset and so forth mentioned above, real op-amp parameters are subject to drift over time and with changes in temperature, input conditions, etc. Modern integrated FET or MOSFET op-amps approximate more closely the ideal op-amp than bipolar ICs where large signals must be handled at room temperature over a limited bandwidth; input impedance, in particular, is much higher, although the bipolar op-amps usually exhibit superior (i.e., lower) input offset drift and noise characteristics.
Where the limitations of real devices can be ignored, an op-amp can be viewed as a black box with gain; circuit function and parameters are determined by feedback, usually negative. IC op-amps as implemented in practice are moderately complex integrated circuits; see the internal circuitry for the relatively simple 741 op-amp below, for example.

DC imperfections

Open-loop gain is defined as the amplification from input to output without any feedback applied. For most practical calculations, the open-loop gain is assumed to be infinite; in reality it is obviously not. Typical devices exhibit open-loop DC gain ranging from 100,000 to over 1 million; this is sufficiently large for circuit gain to be determined almost entirely by the amount of negative feedback used. Op-amps have performance limits that the designer must keep in mind and sometimes work around. In particular, instability is possible in a DC amplifier if AC aspects are neglected.
Other imperfections include:
  • Finite gain — the effect is most pronounced when the overall design attempts to achieve gain close to the inherent gain of the op-amp.
  • Finite input resistance — this puts an upper bound on the resistances in the feedback circuit. Some op-amps have circuitry to protect inputs from excessive voltage: this makes input parameters slightly worse. Some op-amps are available in protected (thus slightly degraded) and unprotected versions.
  • Nonzero output resistance — important for low resistance loads. Except for very small voltage output, power considerations usually come into play first. (Output impedance is inversely proportional to the idle current in the output stage — very low idle current results in very high output impedance.)
  • Input bias current — a small amount of current (typically ~10 nA for bipolar op-amps, or picoamperes for CMOS designs) flows into the inputs. This current is mismatched slightly between the inverting and non-inverting inputs (there is an input offset current). This effect is usually important only for very low power circuits.
  • Input offset voltage — the voltage required across the op-amp's input terminals to drive the output voltage to zero. In the perfect amplifier, there would be no input offset voltage. However, it exists in actual op-amps because of imperfections in the differential amplifier that constitutes the input stage of the vast majority of these devices. Input offset voltage creates two problems: First, due to the amplifier's high voltage gain, it virtually assures that the amplifier output will go into saturation if it is operated without negative feedback, even when the input terminals are wired together. Second, in a closed loop, negative feedback configuration, the input offset voltage is amplified along with the signal and this may pose a problem if high precision DC amplification is required or if the input signal is very small.
  • Common mode gain — A perfect operational amplifier amplifies only the voltage difference between its two inputs, completely rejecting all voltages that are common to both. However, the differential input stage of an operational amplifier is never perfect, leading to the amplification of these identical voltages to some degree. The standard measure of this defect is called the common-mode rejection ratio (denoted, CMRR). Minimization of common mode gain is usually important in non-inverting amplifiers (described below) that operate at high amplification.
  • Temperature effects — all parameters change with temperature. Temperature drift of the input offset voltage is especially important.

AC imperfections

The op-amp gain calculated at DC does not apply at higher frequencies. To a first approximation, the gain of a typical op-amp is inversely proportional to frequency. This means that an op-amp is characterized by its gain-bandwidth product. For example, an op-amp with a gain bandwidth product of 1 MHz would have a gain of 5 at 200 kHz, and a gain of 1 at 1 MHz. This low-pass characteristic is introduced deliberately, because it tends to stabilize the circuit by introducing a dominant pole. This is known as frequency compensation.
Typical low cost, general purpose op-amps exhibit a gain bandwidth product of a few megahertz. Specialty and high speed op-amps can achieve gain bandwidth products of hundreds of megahertz. For very high-frequency circuits, a completely different form of op-amp called the current-feedback operational amplifier is often used.
Other imperfections include:
  • Finite bandwidth — all amplifiers have a finite bandwidth. This creates several problems for op amps. First, associated with the bandwidth limitation is a phase difference between the input signal and the amplifier output that can lead to oscillation in some feedback circuits. The internal frequency compensation used in some op amps to increase the gain or phase margin intentionally reduces the bandwidth even further to maintain output stability when using a wide variety of feedback networks. Second, reduced bandwidth results in lower amounts of feedback at higher frequencies, producing higher distortion, noise, and output impedance and also reduced output phase linearity as the frequency increases.
  • Input capacitance — most important for high frequency operation because it further reduces the open loop bandwidth of the amplifier.
  • Common mode gain — See DC imperfections, above.

Nonlinear imperfections

  • Saturation — output voltage is limited to a minimum and maximum value close to the power supply voltages. Saturation occurs when the output of the amplifier reaches this value and is usually due to:
    • In the case of an op-amp using a bipolar power supply, a voltage gain that produces an output that is more positive or more negative than that maximum or minimum; or
    • In the case of an op-amp using a single supply voltage, either a voltage gain that produces an output that is more positive than that maximum, or a signal so close to ground that the amplifier's gain is not sufficient to raise it above the lower threshold.
  • Slewing — the amplifier's output voltage reaches its maximum rate of change. Measured as the slew rate, it is usually specified in volts per microsecond. When slewing occurs, further increases in the input signal have no effect on the rate of change of the output. Slewing is usually caused by internal capacitances in the amplifier, especially those used to implement its frequency compensation.
  • Non-linear transfer function — The output voltage may not be accurately proportional to the difference between the input voltages. It is commonly called distortion when the input signal is a waveform. This effect will be very small in a practical circuit if substantial negative feedback is used.

Distortion in op-amps

Very often operational amplifiers are used for audio filters. The behavior of this type of operational amplifiers is important to get low distortion amplifiers and audio consoles for sound recording and reproduction. The evaluation of distortion is introduced using the Distortion Multiplication Factor (Kd).

Power considerations

  • Limited output current — the output current must obviously be finite. In practice, most op-amps are designed to limit the output current so as not to exceed a specified level — around 25 mA for a type 741 IC op-amp — thus protecting the op-amp and associated circuitry from damage.
  • Limited dissipated power — an opamp is a linear amplifier. It therefore dissipates some power as heat, proportional to the output current, and to the difference between the output voltage and the supply voltage. If the opamp dissipates too much power, then its temperature will increase above some safe limit. The opamp may enter thermal shutdown, or it may be destroyed.
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Operational Amplifiers

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In electronics, an operational amplifier, or op-amp, is a DC-coupled high-gain electronic voltage amplifier with differential inputs and, usually, a single output. Typically the output of the op-amp is controlled either by negative feedback, which largely determines the magnitude of its output voltage gain, or by positive feedback, which facilitates regenerative gain and oscillation. High input impedance at the input terminals and low output impedance are typical characteristics.
Op-amps are among the most widely used electronic devices, used in a vast array of consumer, industrial, and scientific devices. Many standard IC op-amps cost only a few cents in moderate production volume; however some integrated or hybrid operational amplifiers with special performance specifications may cost over $100 US in small quantities.
Modern designs are electronically more rugged than earlier implementations and some can sustain direct short-circuits on their outputs without damage.

Circuit Notation  :

The circuit symbol for an op-amp is shown in Figure 1
  • V+: non-inverting input
  • V: inverting input
  • Vout: output
  • VS+: positive power supply
  • VS−: negative power supply
The power supply pins (VS+ and VS−) can be labeled in different ways (See IC power supply pins). Despite different labeling, the function remains the same. Often these pins are left out of the diagram for clarity, and the power configuration is described or assumed from the circuit. The positions of the inverting and non-inverting inputs may be reversed in diagrams where appropriate; the power supply pins are not commonly reversed. For Example IC741 is an operational amplifier. It is used for doing arithmetic operations on analog computers, instrumentation and other control systems. Operational amplifier is in the class of linear IC's. Linear have a peculiarity that they can take continuous voltage signals like their analog counterparts.These are highly used today because of their high reliability and low cost. They are mainly used as voltage amplifiers. The basic operational amplifier works similar to the following sequence.
input stage--->intermediate stage--->level shifter--->output stage.
Input stage consists of high input impedance it amplifies the difference between the given input signals. The intermediate stage consists of cascaded amplifiers to amplify the signals from the input. Due to high amplification the DC level of the signals goes up. So in order to bring them down to the rated value,level shifter or level translator is used. The output stage consists of class AB/ class B power amplifier in order to amplify the power of the output signal.

Operation of ideal op-amps

The amplifier's differential inputs consist of an inverting input and a non-inverting input, and ideally the op-amp amplifies only the difference in voltage between the two. This is called the "differential input voltage". In its most common use, the op-amp's output voltage is controlled by feeding a fraction of the output signal back to the inverting input. This is known as negative feedback. If that fraction is zero, i.e., there is no negative feedback, the amplifier is said to be running "open loop" and its output is the differential input voltage multiplied by the total gain of the amplifier, as shown by the following equation:
V_\mathrm{out} = (V_+ - V_-) \cdot G_\mathrm{openloop}
where V+ is the voltage at the non-inverting terminal, V is the voltage at the inverting terminal and G is the total open-loop gain of the amplifier.
Because the magnitude of the open-loop gain is typically very large and not well controlled by the manufacturing process, op-amps are not usually used without negative feedback. Unless the differential input voltage is extremely small, open-loop operation results in op-amp saturation (see below in Nonlinear imperfections). An example of how the output voltage is calculated when negative feedback exists is shown below in Basic non-inverting amplifier circuit.
Another typical configuration of op-amps is the positive feedback, which takes a fraction of the output signal back to the non-inverting input. An important application of it is the comparator with hysteresis (see Schmitt trigger).
For any input voltages the ideal op-amp has
  • infinite open-loop gain,
  • infinite bandwidth,
  • infinite input impedances (resulting in zero input currents),
  • zero offset voltage,
  • infinite slew rate,
  • zero output impedance, and
  • zero noise.
The inputs of an ideal op-amp under negative feedback can be modeled using a nullator, the output with a norator and the combination (complete ideal op-amp) by a nullor.

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Integrated Stereo Amplifier

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The type TDA1521 from Vallvo/Mullard is an Integrated Stereo amplifier designed for mains fed applications such as stereo TV.
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Transistor Biasing

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The basic function of transistor is amplification. The process of raising the strength of a weak signal without any change in its general shape is referred to as faithful amplification. For faithful amplification it is essential that 
                   1.       Emitter-base junction is forward biased.
                   2.       Collector –base junction is reverse biased;
                   3.       Proper zero signal collector current.

For achieving faithful amplification, fulfillment of the following basic conditions is essential :

1.       Proper Zero Signal Collector Current :- Zero signal collector current should be atleast  equal to the maximum collector current due to signal alone i.e  zero signal >or equal to maximum collector current.
2.       Minimum Proper base-emitter Voltage  at Any Instant :- The base-emitter voltage Vbe  should not fall below  0.3V for germanium transistors and 0.7 V for silicon transistors at any instant. If the base emitter voltage  Vbe  falls below these values during any part of signal, that part will be amplified to smaller extent due to smaller collector current and therefore, faithful amplification will not be available.
3.       Minimum Proper Collector-Emitter Voltage At Any Instant  :-  The collector-emitter voltage Vce  should not fall below Knee voltage(0.5V for germanium and 1.0V for silicon Transistors).
With Collector-emitter  voltage Vce less than Knee voltage, the collector-base junction is not properly reverse biased causing increase in base current Ib and decrease in collector current Ic and so decrease in the value of B(beta). Thus when  Vce  falls below Knee voltage Vknee during any part of the signal, that part will be amplified to lesser extent due to reduced value of B(beta)  and result in unfaithful amplification. For collector emitter voltage exceeding knee voltage, the collector-base junction is properly reverse biased and the value of B(beta)  remains constant, resulting in unfaithful amplification.

The conditions 1 and 2 ensure that emitter-base junction remains properly forward biased during all parts of the signal and condition 3 ensures that  collector-base junction remains properly reverse-biased at all times. By fulfilling these conditions the transistor is made to operate over range of its characteristic curves which are linear-parallel and equi-spaced for equal increments of the parameter.
                           The proper flow of zero signal collector current and the maintenance of proper collector-emitter voltage during the passage of signal is called the transistor biasing. If the transistor is not biased properly, it would work inefficiently and produce distortion in the output signal. A transistor is biased either with the help of battery or associating a circuit with the transistor. The latter method is more efficient and is frequently used. The circuit used for transistor biasing is called the biasing circuit. It may be noted that transistor biasing is very essential for the proper operation of transistor in any circuit.

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P-N diode applications

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An ideal P-N junction diode is of two terminal polarity sensitive device that has zero resistance ( i.e diode conducts)when it is forward biased and infinite resistance( i.e diode does not conduct) when reverse biased. Because of this property the diode finds use in many applications as enumerated below:

1.       As rectifier in dc power supplies.
2.       In demodulation or detector circuits.
3.       In clamping networks employed as dc restorers in TV receivers  and  voltage multipliers.
4.       In clipping circuits used as wave shaping circuits in computers, radars, radio and TV receivers.
5.       As switches in digital logical circuits.

The same PN junction with different doping concentrations finds special applications as follows:

1.       As zener  diodes  in voltage regulators, peak clippers, in switching operation.
2.       As tunnel diodes as a relaxation oscillator at microwave frequencies.
3.       As light emitting diodes(LEDs) in digital displays.
4.       As LASER diodes in optical communications.
5.       As varactor diodes in tuning  sections of radio and TV receivers.
6.       As detectors(PIN photodiode) in optical communication circuits.
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