Best Amplifier for signal supply Circuit Diagram

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Best Amplifier for signal supply Circuit Diagram complicates the design process even further because of the reduced signal swings. This unity-gain follower amplifier has a CMOS p-channel input, an npn second-gain stage, and a CMOS inverter output. The IC building blocks are two CA3600E`s (CMOS transistor pairs) and a CA3046 npn transistor array. A zener-regulated leg provides bias for a 400-I`A p-channel source, feeding the input stage, which is terminated in an npn current mirror. 

 Best Amplifier for signal supply Circuit Diagram

Best Amplifier for signal supply Circuit Diagram

 The amplifier voltage-offset is nulled with the 10-K!l balance potentiometer. The second-stage current level is established by the 20-K!lload, and is selected to approximately theist-stage current level, to assure similar positive and negative slew rates. The CMOS inverter portion forms the final output stage and is terminated in a 2-K!l load, a typical value used with monolithic op amps. Voltage gain is affected by the choice of load resistance value. The output stage of this amplifier is easily driven to within 1 mV of the negative supply voltage.
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